The present invention relates to a technology of a semiconductor device and, for example, to a technology which is effectively applied to a semiconductor device where a conductor pattern having multiple solder balls joined thereto is formed over the mounting surface of a wiring board over which a semiconductor chip is mounted.
Japanese Unexamined Patent Application Publication No. 2009-117862 discloses a semiconductor device including a wiring board in which a solder mask defined (SMD) structure and a non-solder mask defined (NSMD) structure are combined.
Japanese Unexamined Patent Publication No. 2009-147053 discloses a semiconductor device where the positions of apertures formed in a solder resist are shifted toward the corners and peripheries of a wiring board with respect to lands.
Japanese Unexamined Patent Publication No. 2010-245455 discloses a semiconductor device where, of the peripheries of a land (pad) disposed at a corner, a periphery remote from the center of a substrate is covered by a solder resist and a periphery adjacent to the center of the substrate is exposed from the solder resist.